We start every project by making the high-level decisions the design project. Here, we identify:

• the optimal foundry & design tools
• the best optical source integration method
• the overall system integration requirements
• chip specifications

We leverage both the maturity of the chosen foundry’s process design kit (PDK) and Syphos’ own higher level subsystem portfolio to ensure that fabrication iterations are minimized. We use standardized electrical and optical interfaces on the physical chip to minimize testing and packaging overhead.

Fabrication is outsourced to the foundry that combines the best characteristics for your application from cost, performance, and volume perspectives. We use state-of-the-art semiconductor fabs with a variety of material platforms, which include silicon on insulator, silicon nitride on insulator, and indium phosphide.

Testing and packaging make up a significant portion of the cost of the fabrication process of a usable chip. The chips are designed with simple and standardized testing and packaging in mind, both in the prototype and production stages, in order to minimize overhead costs.